TAPPED PASSIVE DELAY LINES
 24DIP-XXXX
24 Pin DIP
Tapped Passive Delay Line
-Analog input and outputs
-Delays stable and precise
-24-pin DIP package (.225 high)
-Available in delays from 20ns to 1000ns
-Twenty (20) equally-spaced taps
-Available in impedances of 50, 100, 200,
-350 and 500 ohms
DESIGN NOTES
The "24DIP series" Lumped Constant Passive Delay lines developed by Engineered Components Company have been designed to provide precise delays for analog delay line applications. These delay lines provide excellent delay accuracy, low DCR, low attenuation and low distortion.
These delay lines are offered in 116 models with delays from 20 to 1000ns and with taps at 5% increments of total delay. Delay time is measured at the 50% point on the leading edge. Accuracies are maintained as shown under "Operating Characteristics." Temperature coefficient of delay is less than 75 ppm/°C over the operating temperature range of -55 to +125°C.
"24DIP series" LC delay lines are intended for use in most analog applications; they are also compatible with the low signal levels of TTL and ECL. These delay lines find extensive use in providing the required delay timing functions necessary in radar, computer, communications, testing and instrument applications.
Construction of the "24DIP series" utilizes miniature inductors and monolithic ceramic capacitors to provide the utmost in miniaturization and reliability. The MTBF on these delay lines, when calculated per MIL-HDBK-217, for a 50°C ground fixed environment and with 5V DC applied, is in excess of 13 million hours.
The "24DIP series"
delay lines are packaged in a 24-pin DIP housing,
molded of flameproof Diallyl Phthalate per ASTM
D 5948, Type SDG-F. These delay lines are designed
to meet the applicable portions of MIL-D-23859
and they are capable of meeting the environmental
requirements of MIL-STD-202 for moisture resistance,
vibration, temperature cycling, humidity and life.
Flat metal leads meet the solderability requirements
of MIL-STD-202, Method 208. Corner standoffs on
the housing provide positive standoff from the
printed circuit board to permit solder-fillet
formation and flush cleaning of solder-flux residues
for improved reliability.
Marking consists of manufacturer's name, logo (EC2), part number, terminal identification and date code of manufacture. All marking is applied by silk screen process using white epoxy paint in accordance with MIL-STD-130, to meet the permanency of identification required by MIL-STD-202, Method 215.
TEST CONDITIONS
1. All measurements are made at 25°C.
2. Test procedures in accordance with MIL-D-23859.
OPERATING CHARACTERISTICS
Impedance tolerance: ................ ±10%
Attenuation, maximum: ............... 1.0 db
Distortion, maximum: ................ ±5%
Overshoot, maximum: ................. 10%
Working voltage, maximum: ........... 25V DC
Dielectric strength: ................ 100V DC @ 50uA
Insulation resistance, minimum: ..... 10,000 megohms
@ 100V DC
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