PULSE GENERATOR MODULES
FPCG-TTL-XX
FAST TTL
Pixel Clock Generator
- T²L FAST input and output
- Output wavetrain can be synchronized with random events
- 20-pin DIP package (.290 high)
- Available in frequencies from 2MHz to 30MHz
- Output frequencies controlled to within ±2%
- 10 T²L fan-out capacity
DESIGN NOTES
The "DIP Series" Pixel Clock Generator Modules developed by Engineered Components Company have been designed for use in digital video systems to produce a T²L square wave output (O1) which is resynchronized by random input pulses. This synchronization requires a negative input pulse and is normally obtained from the horizontal scan of this system; it is , in effect, the horizontal sync pulse. The ability of this unit to resync on random pulses eliminates the requirement for an even multiple relationship between the Pixel clock frequency and the horizontal scan rate. Synchronization is obtained by lengthening output half cycles, as required. No shortened half cycles are allowed, thus precluding the possibility of some ICs being triggered while others are not, which could easily happen if both lengthening and shortening were used. This method does, however, require two cycles of the output before synchronization can be assured. The first assured synchronized edge will be a falling edge which occurs two (2) per iods after sync. The following rising edge is the first assured synchronized/valid rising edge. In addition to the square wave output, the Pixel Clock Generator Module provides a negative output pulse (O2) which goes low approximately 3.5ns after the sync input and returns to a high before the first valid falling edge of the square wave output (O1). This pulse is intended for use as a counter or system reset. The FPCG also provides a third output (O3) which goes high approximately 10ns after sync in and does not return low until after the first valid rising edge of the square wave output (O1). If this output is used to enable the counters, the first rising edge is "0" instead of "1" and the counters will change to "1" on the second rising edge out making memory address "0" usable. Output O3 is a complement of O3.
These Pixel Clock Generator Modules are of hybrid construction utilizing the proven technologies of active integrated circuitry and of passive networks utilizing capacitive, inductive and resistive elements. The MTBF on these modules, when calculated per MIL-HDBK-217 for a 50°C ground fixed environment, is in excess of 1 million hours.
The FPCG-TTL
is offered in thirty-seven (37) different frequencies from
2 MHz to 30 MHz. Output frequencies are controlled to within
±2%
and have a temperature coefficient of less than -500ppm/øC
over the operating temperature range of 0 to +70°C.
These "DIP Series" modules are packaged in a 20-pin DIP
housing, molded of flame-proof Diallyl Phthalate per ASTM
D 5948,Type SDG-F, and are fully encapsulated in epoxy resin.
Leads meet the solderability requirements of MIL-STD-202,
Method 208. Corner standoffs on the housing provide positive
standoff from the printed circuit board to permit solder-fillet
formation and flush cleaning of solder-flux residues for
improved reliability.
Marking consists of manufacturer's name, logo (EC²), part number, terminal identification and date code of manufacture. All marking is applied by silk screen process using white epoxy paint in accordance with MIL-STD-130, to meet the permanency of identification required by MIL-STD-202, Method 215.


TEST CONDITIONS
1. All measurements are made at 25°C.
2. Vcc supply voltage is maintained at 5.0V DC.
3. All units are tested using a FAST toggle-type gate driving the input and one FAST T²L load at the output.
OPERATING SPECIFICATIONS
*Vcc supply voltage:........... 4.75 to 5.25V DC
Vcc supply current:
Constant "0" in............. 63mA typical
Constant "1" in............. 37mA typical
Logic 1 Input:
Voltage..................... 2V min.; Vcc max.
Current..................... 2.7V = 60uA max.
5.5V = 3mA max.
Logic 0 Input:
Voltage..................... 0.8V max.
Current..................... -1.8mA max.
Logic 1 Voltage out:........... 2.7V min.
Logic 0 Voltage out:........... 0.5V max.
Operating temperature range:... 0 to 70°C.
Storage temperature:........... -55 to +125°C.
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*Output frequency will increase or decrease less than 1% for a respective increase or decrease of 5% in supply voltage.
PART NUMBER TABLE
PART NUMBER
FPCG-TTL-2
FPCG-TTL-2.5
FPCG-TTL-3
FPCG-TTL-3.5
FPCG-TTL-4
FPCG-TTL-4.5
FPCG-TTL-5
FPCG-TTL-5.5
FPCG-TTL-6
FPCG-TTL-6.5
FPCG-TTL-7
FPCG-TTL-7.5
FPCG-TTL-8
FPCG-TTL-8.5
FPCG-TTL-9
FPCG-TTL-9.5
FPCG-TTL-10
FPCG-TTL-11
FPCG-TTL-12
FPCG-TTL-13
FPCG-TTL-14
FPCG-TTL-15
FPCG-TTL-16
FPCG-TTL-17
FPCG-TTL-18
FPCG-TTL-19
FPCG-TTL-20
FPCG-TTL-21
FPCG-TTL-22
FPCG-TTL-23
FPCG-TTL-24
FPCG-TTL-25
FPCG-TTL-26
FPCG-TTL-27
FPCG-TTL-28
FPCG-TTL-29
FPCG-TTL-30 |
OUTPUT FREQUENCY
2.0 MHz
2.5 MHz
3.0 MHz
3.5 MHz
4.0 MHz
4.5 MHz
5.0 MHz
5.5 MHz
6.0 MHz
6.5 MHz
7.0 MHz
7.5 MHz
8.0 MHz
8.5 MHz
9.0 MHz
9.5 MHz
10.0 MHz
11.0 MHz
12.0 MHz
13.0 MHz
14.0 MHz
15.0 MHz
16.0 MHz
17.0 MHz
18.0 MHz
19.0 MHz
20.0 MHz
21.0 MHz
22.0 MHz
23.0 MHz
24.0 MHz
25.0 MHz
26.0 MHz
27.0 MHz
28.5 MHz
29.0 MHz
30.0 MHz |
Special modules can be readily manufactured to improve accuracies and/or provide customer specified frequencies for specific applications.
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