NOISE FILTER MODULES

ECLNFM-XX

10K ECL Logic Noise Filter Module

• - ECL input and output
  - Pulse Width Detection stable and precise
  - 16-pin DIP package (.250 high)
  - Available in pulse widths from 5ns to 5OOns
  - 70 ECL DC fan-out capacity

DESIGN NOTES

The "DIP Series" Logic Noise Filter Modules developed by Engineered Components Company have been designed for us in ECL systems employing data pulses of either a fixed width or a minimum width. The filter module will produce a "1" at the output, without significant change in width, only when a "1" appears at the input for greater than the specified pulse width all shorter pulses will be suppressed. This operation will effectively eliminate sources of stray noise pulses and should prove particularly effective in eliminating transients created by cross talk from leading edges of fast rise time pulses.

The ECLNFM is offered in 24 pulse widths from 5ns to 500ns, for optimum noise pulse rejection in various systems. Tolerance on pulse width recognition is maintained as shown in the accompanying part number table, when tested under the "Test Conditions" shown. Temperature coefficient is less than ± 200ppm/°C over the operating temperature range of -30 to +85°C.

These noise filter modules are of hybrid construction utilizing the proven technologies of active integrated circuitry and of passive networks utilizing capacitive, inductive and resistive elements. The ICs utilized in these modules are burned-in to Level B of MIL-STD-883 to ensure a high MTBF, The MTBF on these modules, when calculated per MIL-HDBK-217 for a 50°C ground fixed environment, is in excess of 1.8 million hours.

These "DIP Series" modules are packaged in a 16-pin DIP housing, molded of flame-proof Diallyl Phthalate per ASTM D 5948, Type SDG-F, and are fully encapsulated in epoxy resin. Flat metal leads meet the solderability requirementsof MIL-STD-202, Method 208. Leads provide positive stand off from the printed circuit board to permit solder-fillet formation and flush cleaning of solder-flux residues for improved reliability.

Marking consists of manufacturer's name, logo (EC²), part number, terminal identification and date code of manufacture. All marking is applied by silk screen process using white epoxy paint in accordance with MIL-STD-130, to meetthe permanency of identification required by MI L-STD-202, Method 215.

TEST CONDITIONS

1. All measurements are made at 25°C.
2. Vee supply voltage is maintained at -5.2V DC.
3. All units are tested using a positive input pulse provided by a standard open emitter ECL 10,000 gate. The input and output utilize a 100 ohm pulldown resistor to -2V; the output is also loaded with one ECL 10,000 gate.
Æ4. All units are tested to verify suppress and pass pulse widths, as tabulated in the part number table.

OPERATING SPECIFICATIONS

*Supply voltage:............... -5.2V ±5% to Vee 
                  (can beoperated on +5V to Vcc).
Supply current:................ 55ma typical
Logic 1 input at 25°C:
        Voltage................ -0.98 min.
        Current................ 265ua max.
Logic 0 input at 25°C:
        Voltage................ -1.63 max.
        Current................ 5ua min.
Logic 1 Voltage out at 25°C:... -0.96 min.
Logic 0 Voltage out at 25°C:... -1.65 max.
Operating temperature range:... -30 to +85°C
Storage temperature:........... -55 to +125°C 
                      

*Pulse width suppression times increase or decrease approximately 1% for a respective increase or decrease of 5% in supply voltage.

PART NUMBER TABLE

The output of the module will remain at state "0" for any transient input pulses shorter than suppress times and will change to state "1" for pulses longer than pass times. Input pulse width is measured at the -1.3V level.

Special modules can be readily manufactured to provide customer specified times for specific applications.