FREQUENCY MULTIPLIER MODULES

ECL-100K-DFMM-XX

100K ECL Logic Digital Frequency Multiplier Module

- ECL 100K input and output
- 0utput wavetrain synchronized with input square wave
- 12-pin DIP package (.325) high
- Available in frequencies from 50Mhz to 250Mhz
- 70 ECL DC fan-out capacity

DESIGN NOTES

The "DIP Series" Digital Frequency Multiplier Modules developed by Engineered Components Company have been designed to provide precise ECL 100K square wave outputs at selected clock frequencies which are synchronized by square waproviding a square wave output within ±2% of the desired frequency. Temperature coefficient of this free-running frequency is less than ±300 ppm/°C. Like all frequency multipliers, either digital or sinusoidal, the amount of phase jitter in the output will increase as higher orders of multiplication are used; although this effect is small, lower orders of multiplication should be considered in those applications where these slight time variations are important.

The ECL-100K-DFMM is offered in twenty-six (26) standard clock frequencies from 50 to 250 Mhz. When tested under the "Test Conditions" shown, output frequency is maintained to within +.005% of the nearest multiple of the input frequency. Each of these modules are capable of driving up to 70 ECL DC loads.

These Digital Frequency Multiplier Modules are of hybrid construction utilizing the proven technologies of active integrated circuitry and of passive networks utilizing capacitive, inductive and resisitve elements. The ICs utilized in these modules are burned-in to level B of MIL-STD-883 to ensure a high MTBF. The MTBF on these modules, when calculated per MIL-HDBK-217 for a 50°C ground fixed environment, is in excess of 1.9 million hours.

These "DIP Series" modules are packaged in a 12-pin DIP housing, molded of flame-proof Diallyl Phthalate per ASTM D 5948, Type SDG-F, and are fully encapsulated in epoxy resin. Leads meet the solderability requirements of MIL-STD-202, Method 208. Corner standoffs on the housing provide positive standoff from the printed circuit board to permit solder-fillet formation and flush cleaning of solder-flux residues for improved reliability.

Marking consists of manufacturer's name, logo (EC2), part number, terminal identification and date code of manufacture. All marking is applied by silk screen process using white epoxy paint in accordance with MIL-STD-130, to meet the permanency of identification required by MIL-STD-202, Method 215.

TEST CONDITIONS

1. All measurements are made at 25°C.
2. Vee supply voltage is maintained at -4.5V DC.
3. All units are tested using a positive input pulse provided by a standard open emitter ECL 100K gate. The input and output utilize a 50 ohm pulldown resistor to -2V; the output is also loaded with one ECL 100K gate.
4. Input is ECL 100K square wave at 20% of output frequency.

OPERATING SPECIFICATIONS

Supply Voltage ..................... -4.5V ±5% to Vee 
Supply Current ...................... 102ma typical
Logic 1 Input at 25°C.
    Voltage ......................... -.88V min.
    Current ......................... 700ua max,
Logic 0 Input at 25°C.
    Voltage ......................... -1.81V max.
    Current ......................... 1ua min. 
Logic 1 output at 25°C .............. -1.025V min.
Logic 0 output at 25°C .............. -1.620V max.
0perating temperature range:.........  0° to +85°C.
Storage temperature: ................ -55° to +125°C.

PART NUMBER TABLE

Special modules can be readily manufactured to provide customer specified output frequencies for specific applications.