LOGIC DELAY MODULES
 FLDMT-TTL-XX
FAST TTL
Logic Delay Module (Thin Profile Package)
-
TTL input and outputs
- Delays stable and precise
- 14-pin DIP package (.150 high)
- Available
in delays from 10 to 250ns
- Output
and four (4) taps--each isolated and with 10 TTL fan-out
capacity
- Fast rise time on all outputs
DESIGN NOTES
The " DIP Series"
Logic Delay Modules developed by Engineered Components Company
have been designed to provide precise tapped delays with
required driving and pick-off circuitry contained in a single
14-pin DIP package compatible with FAST and Schottky T²L
circuits. These logic delay modules are of hybrid construction
utilizing the proven technologies of active integrated circuitry
and of passive networks utilizing capacitive, inductive
and resistive elements. The MTBF on these modules, when
calculated per MIL-HDBK-217 for a 50° C ground fixed
environment, is in excess of 2 million hours. Module design
includes compensation for propagation delays and incorporates
internal termination at the output; no additional external
components are needed to obtain the desired delay.
The FLDM-TTL
is offered in 28 delays from 10 to 250ns with each module
incorporating total output and four (4) taps. Delay tolerances
are maintained as shown in the accompanying part number
table, when tested under the "Test Conditions" shown. Delay
time is measured at the +1.5V level on the leading edge.
Rise time for all modules is 4ns maximum when measured from
0.8V to 2.0V. Temperature coefficient of delay is approximately
+500 ppm/°C over the operating temperature range of
0 to +70°C.
These modules
accept either logic "1" or logic "0" inputs and reproduce
the logic at the output without inversion. The delay modules
are intended primarily for use with positive going pulses
and are calibrated to the tolerances shown in the table
on rising edge delay; where best accuracy is desired in
applications using falling edge timing, it is recommended
that a special unit be calibrated for the specific application.
Each module has the capability of driving up to 20 Schottky
T²L loads with a maximum of 10 loads on any one tap.
These " DIP
Series" modules are packaged in an 14-pin DIP housing, molded
of flame-proof Diallyl Phthalate per ASTM D 5948, Type SDG-F,
and are fully encapsulated in epoxy resin. Leads meet the
solderability requirements of MIL-STD-202, Method 208. Corner
standoffs on the housing of the thru-hole lead version and
lead design of the surface mount versions provide positive
standoff from the printed circuit board to permit solder-fillet
formation and flush cleaning of solder-flux residues for
improved reliability.
Marking consists
of manufacturer's name, logo (EC²), part number, terminal
identification and date code of manufacture. All marking
is applied by silk screen process using white epoxy paint
in accordance with MIL-STD-130, to meet the permanency of
identification required by MIL-STD-202, Method 215.
TEST CONDITIONS
1. All measurements
are made at 25°C.
2. Vcc supply voltage is maintained at 5.0V DC.
3. All units are tested
using a Schottky toggle-type positive input pulse and one
Schottky load at the output being tested.
Æ4.
Input pulse width used is 5 to 10ns longer than full delay
of module under test; spacing between pulses (falling edge
to rising edge) is three times the pulse width used.
OPERATING SPECIFICATIONS
*Vcc supply voltage:........... 4.5 to 5.5V DC
Vcc supply current:
Constant "0" in................ 40mA typical
Constant "1" in................ 7mA typical
Logic 1 input:
Voltage................ 2V min.; Vcc max.
Current ..................... 2.7V = 20uA max.
5.5V = 1mA max.
Logic 0 Input:
Voltage ..................... 0.8V max.
Current ..................... -.6mA max.
Logic 1 Voltage out: ........... 2.7V min.
Logic 0 Voltage out: ........... 0.5V max.
Operating temperature range: ... 0 to 70°C
Storage temperature: ........... -55 to +125°C.
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*Delays decrease
or increase approximately 2%for a respective increase or
decrease of 5% in supply voltage.
PART NUMBER TABLE
DELAYS AND TOLERANCES (in
ns)
| Part Number |
Tap 1 |
Tap2 |
Tap3 |
Tap4 |
Output |
FLDMT-TTL-10
FLDMT-TTL-12
FLDMT-TTL-14
FLDMT-TTL-16
FLDMT-TTL-18
FLDMT-TTL-22
FLDMT-TTL-25
FLDMT-TTL-30
FLDMT-TTL-35
FLDMT-TTL-40
FLDMT-TTL-45
FLDMT-TTL-50
FLDMT-TTL-55
FLDMT-TTL-60
FLDMT-TTL-65
FLDMT-TTL-70
FLDMT-TTL-75
FLDMT-TTL-80
FLDMT-TTL-85
FLDMT-TTL-90
FLDMT-TTL-95
FLDMT-TTL-100
FLDMT-TTL-125
FLDMT-TTL-150
FLDMT-TTL-175
FLDMT-TTL-200
FLDMT-TTL-225
FLDMT-TTL-250
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6 ±1
6 ±1
6 ±1
6 ±1
6 ±1
6 ±1
5 ±1
6 ±1
7 ±1
8 ±1
9 ±1
10 ±1
11 ±1
12 ±1
13 ±1
14 ±1
15 ±1
16 ±1
17 ±1
18 ±1
19 ±1
20 ±1
25 ±1
30 ±1.5
35 ±1.5
40 ±1.5
45 ±2
50 ±2
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7 ±1
7.5 ±1
8 ±1
8.5 ±1
9 ±1
10 ±1
10 ±1
12 ±1
14 ±1
16 ±1
18 ±1
20 ±1
22 ±1
24 ±1
26 ±1.5
28 ±1.5
30 ±1.5
32 ±1.5
34 ±1.5
36 ±1.5
38 ±1.5
40 ±1.5
50 ±2
60 ±2
70 ±2.5
80 ±2.5
90 ±3
100 ±3
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8 ±1
9 ±1
10 ±1
11 ±1
12 ±1
14 ±1
15 ±1
18 ±1
21 ±1
24 ±1.5
27 ±1
30 ±1
33 ±1.5
36 ±1.5
39 ±1.5
42 ±2
45 ±2
48 ±2
51 ±2
54 ±2
57 ±2
60 ±2
75 ±2.5
90 ±3
105 ±4
120 ±4
135 ±4
150 ±4.5
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9 ±1
10.5 ±1
12 ±1
13.5 ±1
15 ±1
18 ±1
20 ±1
24 ±1
28 ±1.5
32 ±1.5
36 ±1.5
40 ±2
44 ±2
48 ±2
52 ±2
56 ±2
60 ±2.5
64 ±2.5
68 ±2.5
72 ±2.5
76 ±2.5
80 ±3
100 ±3
120 ±4
140 ±5
160 ±5
180 ±6
200 ±6
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10 ±1
12 ±1
14 ±1
16 ±1
18 ±1
22 ±1
25 ±1
30 ±1
35 ±1.5
40 ±1.5
45 ±2
50±2
55 ±2
60 ±2
65 ±2.5
70 ±2.5
75 ±2.5
80 ±3
85 ±3
90 ±3
95 ±3
100 ±3
125 ±4
150 ±5
175 ±5
200 ±6
225 ±7
250 ±8
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All modules can be operated
with a minimum input pulse width of 40% of full delay and
pulse period approaching square wave; since delay accuracies
may be somewhat degraded, it is suggested that the module
be evaluated under the intended specific operating conditions.
Special modules
can be readily manufactured to improve accuracies and/or
provide customer specified random delay times for specific
applications.
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